Model-Defined
Chip Design

Founded in 2023,
XHEART designs chips for large-model computing.
We let models define chip architecture,
building high-performance, energy-efficient compute.
Our chips are in mass production,
powering intelligent vehicles and expanding into robotics.

Every journey forwardstarts at the right place

Portrait of Zonglin Li

Zonglin Li

Chief Executive Officer

Portrait of Mingjun Jia

Mingjun Jia

Vice President, Software

Portrait of Guojun Yu

Guojun Yu

Vice President, SoC

XHEART team at an outdoor event

One person sees the possibility.
Together, we make it happen.

of our team works in R&D

85%

of our employees hold a master's degree or higher

80%
  1. XHEART founded

  2. ISO 26262 development
    process certified

  3. X7 tape-out completed

  4. First X7 silicon powered on

  5. X7 vehicle testing completed

  6. X7 entered vehicle production

  7. XHEART completed
    shareholding reform

  8. X7 received ISO 26262
    product certification

  9. X7 Ultra launched

Every step begins a new chapter

Milestones along our journey

Our capabilities
independently recognized

Each certification verifies our technical capabilities
and professional standards

X7 AEC-Q100 Conformance CertificateX7 AEC-Q100 Conformance Certificate
ISO 9001 Quality Management System Certificate (Chinese)ISO 9001 Quality Management System Certificate (Chinese)
ISO 9001 Quality Management System Certificate (English)ISO 9001 Quality Management System Certificate (English)
ISO 20000-1 IT Service Management System CertificateISO 20000-1 IT Service Management System Certificate
ISO 26262 Development Process CertificateISO 26262 Development Process Certificate
ISO 27001 Information Security Management System Certificate (Page 1)ISO 27001 Information Security Management System Certificate (Page 1)
ISO 27001 Information Security Management System Certificate (Page 2)ISO 27001 Information Security Management System Certificate (Page 2)
X7 AEC-Q100 Verification CertificateX7 AEC-Q100 Verification Certificate
X7 SoC ASIL B / ASIL D Conformance CertificateX7 SoC ASIL B / ASIL D Conformance Certificate
Silhouette against a blue horizon

Move Forward
With Us

Join Our Team
Create new possibilities
through technology

NPU Digital Design EngineerDesign NPU IP front-end logic and define the microarchitecture of NPU subsystems and core modules. Collaborate with architecture and verification teams, support physical implementation and improve SoC solutions.

Responsibilities:

  1. Design NPU IP front-end logic and help define the microarchitecture of NPU subsystems and core modules, including tensor cores, PPA optimization, KV cache, profiling and tracing;
  2. Work closely with architects and verification engineers to ensure functional correctness;
  3. Support physical implementation, including placement, routing and timing closure;
  4. Analyze industry trends and customer needs to guide continued improvement of SoC platform solutions.

Requirements:

  1. Master's degree in microelectronics, electronic engineering, computer science or a related field;
  2. At least five years of NPU, GPU, GPGPU or CPU front-end design experience;
  3. Strong digital design fundamentals, EDA design and simulation skills, and proficiency in Verilog HDL;
  4. Strong communication, coordination and ability to work under pressure.
NPU Design Verification EngineerDefine NPU IP verification plans, build testbenches and flows, verify core modules, and co-simulate functional models with the design under test.

Responsibilities:

  1. Develop NPU IP verification plans, testbenches and verification flows;
  2. Understand NPU internals and verify core modules;
  3. Model IP functions and co-simulate functional simulators with the design under test (DUT);

Requirements:

  1. Master's degree in microelectronics, electronic engineering, computer science or a related field;
  2. At least five years of NPU, GPU, GPGPU or CPU verification experience;
  3. Knowledge of digital design and verification flows, including functional and performance verification of IP;
  4. Experience with UVM, Linux and scripting languages;
  5. AI chip verification experience preferred.
NPU Modeling EngineerDevelop and debug functional and cycle-accurate NPU models for verification and performance analysis, and build architecture exploration models to support chip design decisions.

Responsibilities:

  1. Develop and debug chip models and selected modules;
  2. Work with verification and toolchain teams to develop functional and cycle-accurate NPU models for functional and performance validation;
  3. Research emerging NPU technologies and maintain architecture exploration models that provide quantitative design guidance;

Requirements:

  1. Bachelor's degree or higher in computer science, microelectronics, communications, automation or a related field;
  2. Proficiency in C/C++, SystemC and Python;
  3. Knowledge of processor architecture is a plus;
  4. Strong communication, coordination and ability to work under pressure.
  5. Strong analytical thinking, teamwork, ownership and initiative.
Quality Management Systems EngineerEstablish and maintain quality management systems, lead quality policies and audits, support APQP and project quality reviews, and promote a culture of continuous improvement.

Responsibilities:

  1. Establish and maintain management systems such as ISO 9001 and IATF 16949, and drive their execution and improvement;
  2. Define and maintain quality policies and objectives, and monitor quality across the business;
  3. Lead internal and external audits and management reviews;
  4. Help define and maintain the Advanced Product Quality Planning (APQP) process and stage-gate criteria;
  5. Review project deliverables and phase assessments throughout design and development;
  6. Promote quality tools and culture, and organize quality management training.

Requirements:

  1. Bachelor's degree or higher in computer science, microelectronics, communications, automation or a related field;
  2. At least five years of experience in quality management systems;
  3. Knowledge of quality management standards, tools and methods;
  4. Chip design, manufacturing and test experience preferred;
  5. Organized, accountable and effective in communication and teamwork.
People in soft light

Suzhou

Suzhou, Jiangsu, China
No. 286 Qinglonggang Road, Xiangcheng District
Yangtze River Delta International R&D Community
Building 1, Block B, Room 417

Beijing

Beijing, China
No. 18A Xueqing Road, Haidian District
Zhongguancun Dongsheng Science Park
Xueyuan Park, 3rd Floor, Room B310-1

Shanghai

Shanghai, China
Lane 9, No. 9 Jinwan Road, Pudong New Area
Jinhai Garden, Building 3, 14th Floor

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